FPGA

  • Easy workflow for using UIO (Linux) to access IP on Xilinx Zynq 1

Easy workflow for using UIO (Linux) to access IP on Xilinx Zynq

If like me, you're a newbie to FPGAs, and SoC FPGAs from Xilinx, the complexity of running an application talking to your IP from Linux can be quite daunting. I started by using petalinux from Xilinx to try and use an IP that I made using Vivado HLS (C to

By |2019-09-24T11:30:10+05:30September 17th, 2019|